NTT Electronics Develops HD H.264/MPEG-2 Multi-format Encoder & Decoder Modules
April 3, 2008
Enabling 4:2:2-compatible Compact, Advanced Codec Products for the Broadcasting Market
NTT Electronics Corporation (hereafter, NTT Electronics, President: Tomoyuki Toshima; HQ: Shibuya-ku, Tokyo) has developed HDTV encoder and decoder modules (the SC50KE and the SC50KD, respectively) that are dually compatible with H.264(*1) and MPEG-2.
These products maintain the high-quality video of the VASA(*2) single-chip coding integrated circuit (IC). The VASA IC has brought superior results for the use of MPEG-2 in HDTV environments within the broadcasting industry and includes various peripherals and high-speed memory, and features on the newly-developed H.264/MPEG-2 encoder IC, SARAENC, and the decoder IC, SARADEC(*3). The products are comprised of simple devices, but realize professional high-quality images.
Due to the demand for high-quality video and more efficient and compact devices, there has been a need for H.264, 4:2:2 chroma-compatible codec products in the broadcasting equipment industry. Additionally, the need to support the currently predominant MPEG-2 format still exists. NTT Electronics' products are the only multi-format encoder and decoder modules in the world that meet these market needs. The modules also feature the encoder and decoder ICs as well as the necessary peripherals and high-speed memory. This will contribute to the development of smaller and more advanced broadcasting devices as well as to shorter development times.
NTT Electronics has transitioned to mass production for these products and will begin taking orders in April 2008.
In addition, NTT Electronics will display these products at NAB2008(*4) at the Las Vegas
Right side: HDTV encoder module "SC50KE"
Left side: HDTV decoder module "SC50KD"
Development History
As broadcasters around the world convert to digital high-definition formats, the transition from the MPEG-2 format to the H.264 format is making headway, offering more efficient compression and increasing the demand for ICs that support both formats as well as both the SD and HD formats.
There is also a need for higher bit-rates for image compression during video editing and contribution so that the image stays faithful to the original source. For broadcasting facilities that transmit multiple video and audio signals within a limited bandwidth, there is also a need to minimize as much as possible the image deterioration that accompanies lower bit-rates.
Using technologies cultivated while developing VASA, NTT Electronics developed the industry's only multi-format encoder and decoder ICs, the SARAENC and SARADEC. These ICs contain the latest high-quality conversion architecture to meet market needs, such as field/frame adaptive coding(*5). With additional support for a wide range of bit-rates, ranging from 6 to 40 Mbps (H.264), NTT Electronics meets its customers' diverse needs.
The SC50KE and SC50KD are modules that include the above ICs, peripheral devices and high-speed memory. In addition to making broadcasting equipment more compact and functional, they also help shorten development time.
Furthermore, by combining the SC50KE and SC50KD modules, it is possible to have high-quality transcoding from MPEG-2 to H.264 or from H.264 to MPEG-2, with the ability to maintain built-in coding information.
Starting with the development of the world's first HDTV-compatible single-chip codec ICs (including the VASA), NTT Electronics has built on its success in advanced design technology. The company will continue to advance the capabilities of its broadcasting codec ICs to further its reputation in the worldwide broadcast market.
Utilizing its in-depth experience and refined technical capabilities, NTT Electronics can flexibly customize products to meet any customer's needs.
Characteristics and Applications of SC50KE & SC50KD
- The newly developed H.264/MPEG-2 encoder and decoder ICs (SARAENC and SARADEC) are built-in.
With support for both the H.264 and MPEG-2 formats, it smoothes the transition from the currently predominant MPEG-2 format to the H.264 format, the demand for which is expected to grow.
- 4:2:2 chroma-support for both H.264 and MPEG-2.
Applicable for video servers handling a variety of image formats as well as for the contribution.
- Modules include H.264/MPEG-2 video, peripheral features and high-speed memory.
The easily handled modules include the latest ICs, which can shorten development time for the advanced encoder and decoder systems.
- Two ports for audio input (PES) and three for user data input (PES)
The encoder module includes external PES inputs for audio and user data, enabling the use of multiple audio signals or other user data, such as subtitling and control signals.
- Principal Applications
Applicable for professional video devices, such as contribution equipment, including satellite news gathering (SNG), field pick-up units (FPU), and video servers.
Future Plans
Development plans include technology that shortens the latency (100msec) and the creation of a credit card-sized SD module.
Principal Specifications for the SC50KE & SC50KD
Specification: Encoder Module, SC50KE
| Video Format | 1080i | 1080-24p | 720p | 480p (optional) | 480i | ||||
|---|---|---|---|---|---|---|---|---|---|
| H.264 Video Standard | ISO/IEC 14496-10 | ||||||||
| Profile | High422(8bit), High, Main, Baseline | ||||||||
| Level | 4.1 / 4.0 / 3.2 / 3.1 / 3.0 | ||||||||
| MPEG-2 Video Standard | ISO/IEC 13818-2 | ||||||||
| Profile & Level | 422P@HL MP@H14L MP@HL |
422P@HL MP@H14L MP@HL |
422P@HL MP@HL |
422P@HL MP@HL |
422P@ML MP@ML SP@ML |
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| Video Input | 10bit(Y), 10bit(C) | 10bit(Y/C) | |||||||
| GOP Size | 1～30 | ||||||||
| Interlace Coding |
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| Motion Estimate Search Range (Max) |
Horizontal : -169.75 to +155.75 pixel(M=3, P-Picture) Vertical : -87.5 to +115.75 pixel(M=3, P-Picture) |
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| Pixel Precision for Motion Compensation |
H.264 : 1/2, 1/4 Pixel MPEG-2 : 1/2 Pixel |
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| Block Size for Motion Compensation |
H.264 : 16 x 16, 16 x 8, 8 x 16, 8 x 8 MPEG-2 : 16 x 16, 16 x 8MC |
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| Intra Prediction Modes | H.264 : All Mode | ||||||||
| Entropy Coding | H.264 : CAVLC, CABAC | ||||||||
| MPEG-2 TS | 8bit parallel | ||||||||
| TS output Bit rate | Up to 160 Mbps | ||||||||
| Host CPU Interface | Data Bus : 32bit Address Input : 18bit(Intel CPU family / Motorola CPU family) |
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| Audio Input | PES Serial (Standard/3line) 2Port | ||||||||
| User Input | PES Serial (Standard/3line) 3Port | ||||||||
| Power consumption | 35.0W (Max.) | ||||||||
| Module Size | 170mm(L) x 110mm(W) | ||||||||
| Supply Voltage | 5V | ||||||||
| Connector | SAMTEC QTH-090-01 (180pin) | ||||||||
* Features and specification are subject to change without notice for improvement.
Specification: Decoder Module, SC50KD
| Video Format | 1080i | 1080p | 720p | 480p | 480i |
|---|---|---|---|---|---|
| H.264 Video Standard | ITU-T H.264/MPEG-4 AVC, ISO/IEC 14496-10 | ||||
| Profile | High422(8bit), High, Main, Baseline | ||||
| Level | 4.1 | ||||
| MPEG-2 Video Standard | ISO/IEC 13818-2 | ||||
| Profile & Level | 422P@HL MP@H14L MP@HL |
422P@HL MP@H14L MP@HL |
422P@HL MP@HL |
422P@HL MP@H14L |
422P@ML MP@ML SP@ML |
| Video Output | 10bit(Y), 10bit(C) | 10bit(Y/C) | |||
| MPEG-2 TS | 8bit parallel | ||||
| TS Input Bit rate | Up to 320 Mbps | ||||
| Host CPU Interface | Data Bus : 32bit Address Input : 18bit |
||||
| Audio Output | PES Serial (Standard/4line) 2Port (PES Clock frequency Max. 100MHz) | ||||
| User Output | PES Serial (Standard/4line) 4Port (PES Clock frequency Max. 100MHz) | ||||
| I2S Output | Audio serial 1Port MPEG-1 Layer 1,2 : 2ch MPEG-4 AAC LC : 2ch Dolby Digital(AC-3) : 2ch LPCM : 8ch |
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| Power consumption | 15.0W (Max.) | ||||
| Module Size | 170mm(L) x 110mm(W) | ||||
| Supply Voltage | 5V | ||||
* Features and specification are subject to change without notice for improvement
Terminology
- *1
- H.264 was created as a standard in 2004 jointly by the International Telecommunication Union and Telecommunication Standardization Sector (ITU-T) and the International Standards Organization (ISO) for video codecs. It is also known as MPEG4 AVC. It is capable of realizing more than twice the data compression rates of MPEG-2.
- *2
- The NTT-internal code name, an abbreviation of Versatile and Advanced Signal-processing Architecture, for the HDTV codec for contribution compliant with the MPEG-2 international standard. This IC was the first in the world to realize an MPEG-2 HDTV codec on a single chip.
- *3
- The Super Advanced Real-time codec Architecture for H.264 professional implementations. Enables multi-chip HDTV-level encoding and transfers at the level of single-chip SDTV processes.
- *4
- The annual conference of the National Association of Broadcasters.
- *5
- The SARA technology supports both macroblock-adaptive frame/field (MBAFF) and picture-adaptive frame/field (PAFF) methods to realize superlative encryption efficiency.
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